Patents

Patents Pending

Patent Description Country Application No. Date
DC to AC Inverter with Variable Dead Time using Digital Power Controller for Discharge Devices and the Like ³ USA 12/020,552 Jan.27, 2008
Digital Phase Lock Loop Module (DPLL)¹ USA 11/764,202 June 17, 2007
Method for multi-branch building control systems ² USA 11/367,351 Mar. 6, 2006
Electronic Power Controller for Gas Discharge Devices with dynamic dead time ³ USA 10/939,722 Sept. 13, 2004
Notice of allowance Nov. 12, 2007
Multiple Channel Ballast & Networkable Topology & System Including Power Line Carrier Applications, which claims benefit of U.S. provisional application 60/384,410 dated June 3, 2002 Germany 10392763.8 Dec. 3, 2004
Power Line Carrier Communication Method ² USA Provisional 60/384,410 June 3, 2002
Power Line Carrier Communication Protocol ² USA Provisional 60/384,410 June 3, 2002
Mapping Method ² USA Provisional 60/384,410 June 3, 2002
Power Line Carrier Communication Module² USA Provisional 60/384,410 June 3, 2002
DC to AC Inverter with Dynamic Dead Time using Digital Power Controller for Discharge Devices and the Like USA Provisional 60/111,296 Dec. 7, 1998
Dithering Method for enhancing resolution of Digital PWM USA Provisional 60/111,296 Dec. 7, 1998
DC Filament Supply Circuit for Safe Parallel Lamp Operation for Electronic Ballast USA Provisional 60/111,322 Dec. 7, 1998
Dithering Method for enhancing resolution of Digital PWM USA Provisional 60/111,296 Dec. 7, 1998
DC Filament Supply Circuit for Safe Parallel Lamp Operation for Electronic Ballast USA Provisional 60/111,322 Dec. 7, 1998
High Frequency Hazard Protection for Electronic Ballasts USA Provisional 60/111,216 Dec. 7, 1998
DC to AC Inverter Bridge for Non Linear Resonant Load USA Provisional 60/111,235 Dec. 7, 1998
Protective Circuits for Bridge Inverter of Electronic Ballast USA Provisional 60/111,302 Dec. 7, 1998
Digital hardware configurable Pulse Sequence Generator module USA Provisional ¹ 60/371,156 April 10, 2002
National filings:UK & Germany
4
 03715316.0 Sept. 2004
PIDF (Proportional, Integral, Differential, Feed Forward) hardware configurable module USA Provisional ¹ 60/371,156 April 10, 2002
National filings:UK & Germany
4
 03715316.0 Sept. 2004
Analog to digital Scanner hardware configurable module
4
 National filings:UK & Germany 03715316.0 Sept. 2004
Analog comparator with D/A scanning hardware configurable module USA Provisional ¹ 60/371,156 April 10, 2002
National filings:UK & Germany
4
 03715316.0 Sept. 2004
Hardware configuration method of a digital controller partitioning USA Provisional ¹ 60/371,156 April 10, 2002
National filings:UK & Germany
4
 03715316.0 Sept. 2004
Dithering method for enhanced Digital Pulse Sequence Generator resolution USA Provisional ¹ 60/371,156 April 10, 2002
National filings:UK & Germany
4
 03715316.0 Sept. 2004
  • Continuation of application no. 10/410,362, filed on April 10, 2003, entitled "System on Chip for Digital Control of Electronic Power Devices", which claims benefit of US Provisional application # 60/371,156 dated April 10, 2002.
  • Continuation of application no. 10/449,065 filed June 2, 2003, entitled "Multiple Channel Ballast & Networkable Topology & System Including Power Line Carrier Application", which claims benefit of US Provisional application # 60/384,410 dated June 3, 2002.
  • Continuation of application no. 09/857,616 filed Jan. 2, 2002, entitled "Digital Power Controller for Gas Discharge Devices and the Like".
  • Parent patent application is entitled "System on Chip for Digital Control of Electronic Power Devices".

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